The temper FPGA core provides temporal noise reduction for video applications and is available for Xilinx Spartan-3 and Virtex devices.
The core includes an integrated high-speed DDR/DDR2 SDRAM memory controller.
It is typically integrated together with sinter into a single netlist or bitstream, providing a complete Noise Reduction engine capable of handling all noise sources.
The minimum target device for the combined Noise Reduction netlist is XC3S1200E.